| PART |
Description |
Maker |
| 74LCX112SJ 74LCX112 74LCX112M 74LCX112MTC 74LCX112 |
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
Fairchild Semiconductor, Corp.
http://
FAIRCHILD[Fairchild Semiconductor]
|
| SN54LS112A SN54LS112J 74LS112 SN74LS112N SN74LS112 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
MOTOROLA[Motorola, Inc]
MOTOROLA[Motorola Inc]
|
| SN74LS107D SN74LS107N SN54LS107J SN54LS107A |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
MOTOROLA[Motorola, Inc]
Motorola Inc
MOTOROLA[Motorola Inc]
|
| DV74AC112 |
Dual JK Negative edge-triggered flip-flop
|
AVG Semiconductors(HITEK)
|
| 74F112PC 74F112SC 74F112SJ 74F112 |
Dual JK Negative Edge-Triggered Flip-Flop
|
FAIRCHILD[Fairchild Semiconductor]
|
| SN54_74LS73A ON2951 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
From old datasheet system
|
ON Semi
|
| N74F114D N74F114N 74F114 |
Dual J-K negative edge-triggered flip-flop with common clock and reset
|
NXP Semiconductors
|
| 74F114PC |
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
|
Fairchild Semiconductor
|
| 74LCX112MTC |
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
|
ON Semiconductor
|
| 74F114SC 74F114 74F114PC |
双JK负沿触发器与普通时钟和清除拖鞋
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
From old datasheet system
|
锁存
FAIRCHILD[Fairchild Semiconductor]
|
| MAX685 MAX685EEE |
Dual-Output Positive and Negative / DC-DC Converter for CCD and LCD
Dual D-type Positive-Edge-Triggered Flip-Flops With Preset And Clear 14-CFP -55 to 125
Dual-Output Positive and Negative, DC-DC Converter for CCD and LCD
|
Maxim Integrated Products, Inc.
MAXIM[Maxim Integrated Products]
|
